A Design of BIST / BICS Circuits for Detection of Fault and Defect and Their Locations in VLSI Memories
Vol. 22, No. 10, pp. 2123-2135, Oct. 1997
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Cite this article
[IEEE Style]
김대익, 배성환, 전병실, "A Design of BIST / BICS Circuits for Detection of Fault and Defect and Their Locations in VLSI Memories," The Journal of Korean Institute of Communications and Information Sciences, vol. 22, no. 10, pp. 2123-2135, 1997. DOI: .
[ACM Style]
김대익, 배성환, and 전병실. 1997. A Design of BIST / BICS Circuits for Detection of Fault and Defect and Their Locations in VLSI Memories. The Journal of Korean Institute of Communications and Information Sciences, 22, 10, (1997), 2123-2135. DOI: .
[KICS Style]
김대익, 배성환, 전병실, "A Design of BIST / BICS Circuits for Detection of Fault and Defect and Their Locations in VLSI Memories," The Journal of Korean Institute of Communications and Information Sciences, vol. 22, no. 10, pp. 2123-2135, 10. 1997.
pISSN : 1226 - 4717
eISSN : 2287 - 3880