Design of VLSI Array for High Speed Processing of Block Matching Algorithm
Vol. 23, No. 3, pp. 584-590, Mar. 1998
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Cite this article
[IEEE Style]
이수진 and 성길영, "Design of VLSI Array for High Speed Processing of Block Matching Algorithm," The Journal of Korean Institute of Communications and Information Sciences, vol. 23, no. 3, pp. 584-590, 1998. DOI: .
[ACM Style]
이수진 and 성길영. 1998. Design of VLSI Array for High Speed Processing of Block Matching Algorithm. The Journal of Korean Institute of Communications and Information Sciences, 23, 3, (1998), 584-590. DOI: .
[KICS Style]
이수진 and 성길영, "Design of VLSI Array for High Speed Processing of Block Matching Algorithm," The Journal of Korean Institute of Communications and Information Sciences, vol. 23, no. 3, pp. 584-590, 3. 1998.
pISSN : 1226 - 4717
eISSN : 2287 - 3880