A Prefetch Architecture with Efficient Branch Prediction for a 64-bit 4-way Superscalar Microprocessor
Vol. 25, No. 11, pp. 1939-1947, Nov. 2000
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Cite this article
[IEEE Style]
문상국, 문병인, 이용환, 이용석, "A Prefetch Architecture with Efficient Branch Prediction for a 64-bit 4-way Superscalar Microprocessor," The Journal of Korean Institute of Communications and Information Sciences, vol. 25, no. 11, pp. 1939-1947, 2000. DOI: .
[ACM Style]
문상국, 문병인, 이용환, and 이용석. 2000. A Prefetch Architecture with Efficient Branch Prediction for a 64-bit 4-way Superscalar Microprocessor. The Journal of Korean Institute of Communications and Information Sciences, 25, 11, (2000), 1939-1947. DOI: .
[KICS Style]
문상국, 문병인, 이용환, 이용석, "A Prefetch Architecture with Efficient Branch Prediction for a 64-bit 4-way Superscalar Microprocessor," The Journal of Korean Institute of Communications and Information Sciences, vol. 25, no. 11, pp. 1939-1947, 11. 2000.
pISSN : 1226 - 4717
eISSN : 2287 - 3880