Reduction of Input Pins in VLSI Array for High Speed Fractal Image Compression
Vol. 26, No. 12, pp. 2059-2066, Dec. 2001
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Cite this article
[IEEE Style]
성길영, 전상현, 이수진, 우종호, "Reduction of Input Pins in VLSI Array for High Speed Fractal Image Compression," The Journal of Korean Institute of Communications and Information Sciences, vol. 26, no. 12, pp. 2059-2066, 2001. DOI: .
[ACM Style]
성길영, 전상현, 이수진, and 우종호. 2001. Reduction of Input Pins in VLSI Array for High Speed Fractal Image Compression. The Journal of Korean Institute of Communications and Information Sciences, 26, 12, (2001), 2059-2066. DOI: .
[KICS Style]
성길영, 전상현, 이수진, 우종호, "Reduction of Input Pins in VLSI Array for High Speed Fractal Image Compression," The Journal of Korean Institute of Communications and Information Sciences, vol. 26, no. 12, pp. 2059-2066, 12. 2001.
pISSN : 1226 - 4717
eISSN : 2287 - 3880