A VLSI Design of Entropy Coding Algorithm for JPEG2000 CODEC 


Vol. 29,  No. 1, pp. 35-44, Jan.  2004


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  Abstract

In this paper, we design an efficient VLSI architecture of entropy coding algorithm in JPEG2000. Entropy coder is a context-based binary arithmetic encoder, and composed of a Context Extractor(CE) and an Arithmetic Coder(AC). We speed-up CE by skipping no-operation bits in coding passes, and AC is to be performed based on MQ coder. Because of using Qe value associated with each allowed context and probability estimation, MQ coder is a multiplication free coder that reduces computation loads and makes simple the structure of arithmetic coder. We have developed and synthesized the VHDL models of CE and AC pairs using Xilinx FPGA technology. The proposed architecture operates up to 30MHz.

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  Cite this article

[IEEE Style]

K. Lee, K. Oh, I. Jung, Y. Kim, "A VLSI Design of Entropy Coding Algorithm for JPEG2000 CODEC," The Journal of Korean Institute of Communications and Information Sciences, vol. 29, no. 1, pp. 35-44, 2004. DOI: .

[ACM Style]

Kyoung-min Lee, Kyoung-Ho Oh, Il-Hwan Jung, and Young-Min Kim. 2004. A VLSI Design of Entropy Coding Algorithm for JPEG2000 CODEC. The Journal of Korean Institute of Communications and Information Sciences, 29, 1, (2004), 35-44. DOI: .

[KICS Style]

Kyoung-min Lee, Kyoung-Ho Oh, Il-Hwan Jung, Young-Min Kim, "A VLSI Design of Entropy Coding Algorithm for JPEG2000 CODEC," The Journal of Korean Institute of Communications and Information Sciences, vol. 29, no. 1, pp. 35-44, 1. 2004.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880