Design of Composite Transistors with an Improved Operating Region 


Vol. 28,  No. 3, pp. 185-191, Mar.  2003


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  Abstract

In this paper, we propose two CMOS composite transistors with an improved operating region by reducing the threshold voltage. The proposed composite transistorⅠand transistor Ⅱ employ a P-type folded composite transistor and a composite diode in order to decrease the threshold voltage, respectively. The limitation of the operating region of these transistors by current source is described. All circuits are simulated by Hsipice using 0.25㎛ n-well process with 2.5V supply voltage.

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  Cite this article

[IEEE Style]

G. Lee and Y. Yoo, "Design of Composite Transistors with an Improved Operating Region," The Journal of Korean Institute of Communications and Information Sciences, vol. 28, no. 3, pp. 185-191, 2003. DOI: .

[ACM Style]

Geun-Ho Lee and Young-Gyu Yoo. 2003. Design of Composite Transistors with an Improved Operating Region. The Journal of Korean Institute of Communications and Information Sciences, 28, 3, (2003), 185-191. DOI: .

[KICS Style]

Geun-Ho Lee and Young-Gyu Yoo, "Design of Composite Transistors with an Improved Operating Region," The Journal of Korean Institute of Communications and Information Sciences, vol. 28, no. 3, pp. 185-191, 3. 2003.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880