Design of Low-Error Fixed-width Modified Booth Multiplier Using Booth Encoder Outputs 


Vol. 29,  No. 2, pp. 298-305, Feb.  2004


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  Abstract

This paper presents an error compensation method for a fixed-width modified Booth multiplier that receives a W-bit input and produces a W-bit product. To efficiently compensate for the quantization error, Booth encoder outputs (not multiplier coefficients) are used for the generation or error compensation bias. The truncated bits are divided into two groups depending upon their effects on the quantization error. Then, different error compensation methods are applied to each group. By simulations, it is shown that quantization error can be reduced up to 50% by the proposed error compensation method compared with the existing method with approximately the same hardware overhead in the bias generation circuit. It is also shown that the proposed method leads to up to 40% reduction in area and power consumption of a multiplier compared with the ideal multiplier.

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  Cite this article

[IEEE Style]

K. Cho, W. Kim, J. Chung, "Design of Low-Error Fixed-width Modified Booth Multiplier Using Booth Encoder Outputs," The Journal of Korean Institute of Communications and Information Sciences, vol. 29, no. 2, pp. 298-305, 2004. DOI: .

[ACM Style]

Kyung-Ju Cho, Won-Kuan Kim, and Jin-Gyun Chung. 2004. Design of Low-Error Fixed-width Modified Booth Multiplier Using Booth Encoder Outputs. The Journal of Korean Institute of Communications and Information Sciences, 29, 2, (2004), 298-305. DOI: .

[KICS Style]

Kyung-Ju Cho, Won-Kuan Kim, Jin-Gyun Chung, "Design of Low-Error Fixed-width Modified Booth Multiplier Using Booth Encoder Outputs," The Journal of Korean Institute of Communications and Information Sciences, vol. 29, no. 2, pp. 298-305, 2. 2004.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880