Reducing Power Consumption of a Scheduling for Reuse Module Selection under the Time Constraint 


Vol. 29,  No. 3, pp. 318-323, Mar.  2004


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  Abstract

In this paper, we present a reducing power consumption of a scheduling for reuse module selection under the time constraint.
Traditional high-level synthesis do not allow reuse of complex, realistic datapath component during the task of scheduling. On the other hand, the proposed scheduling of reducing power consumption is able to approach a productivity of the design the low power to reuse which given a library of user-defined datapath component and to share of resource sharing on the switching activity in a shared resource.
Also, we are obtainable the optimal the scheduling result in experimental results of our approach various HLS benchmark environment using chaining and multi-cycling in the scheduling techniques.

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  Cite this article

[IEEE Style]

J. Choi and H. Kim, "Reducing Power Consumption of a Scheduling for Reuse Module Selection under the Time Constraint," The Journal of Korean Institute of Communications and Information Sciences, vol. 29, no. 3, pp. 318-323, 2004. DOI: .

[ACM Style]

Ji-young Choi and Hi-seok Kim. 2004. Reducing Power Consumption of a Scheduling for Reuse Module Selection under the Time Constraint. The Journal of Korean Institute of Communications and Information Sciences, 29, 3, (2004), 318-323. DOI: .

[KICS Style]

Ji-young Choi and Hi-seok Kim, "Reducing Power Consumption of a Scheduling for Reuse Module Selection under the Time Constraint," The Journal of Korean Institute of Communications and Information Sciences, vol. 29, no. 3, pp. 318-323, 3. 2004.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880