Design of a Blind DFE Equalizer for high-speed data communication 


Vol. 27,  No. 7, pp. 704-711, Jul.  2002


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  Abstract

This paper proposes a DFE (Decision Feedback Equalizer) equalizer ASIC using the Multi-Modulus Algorithm (MMA) for cable modem applications. We believe that it is the first effort to combine the DFE structure and the MMA algorithm. The proposed equalizer has been designed for 64/256 QAM modems. The existing MMA equalizer uses two transversal filters and updates two tap weights while the proposed equalizer uses two DFE filter banks to improve the channel adaptive performance and to reduce the number of taps and updates only one tap weights. We have used the 0.35 ㎛ standard cell library. The implemented equalizer ASIC operates at 8 MHz and provides 64 Mbps which is higher than existing equalizers. The total number of gates are about 160,000.

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  Cite this article

[IEEE Style]

W. Park and M. Sunwoo, "Design of a Blind DFE Equalizer for high-speed data communication," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 7, pp. 704-711, 2002. DOI: .

[ACM Style]

Weon-Heum Park and Myung-Hoon Sunwoo. 2002. Design of a Blind DFE Equalizer for high-speed data communication. The Journal of Korean Institute of Communications and Information Sciences, 27, 7, (2002), 704-711. DOI: .

[KICS Style]

Weon-Heum Park and Myung-Hoon Sunwoo, "Design of a Blind DFE Equalizer for high-speed data communication," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 7, pp. 704-711, 7. 2002.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880