Giga-bps CMOS Clock and Data Recovery Circuit with a novel Adaptive Phase Detector
Vol. 27, No. 10, pp. 987-992, Oct. 2002
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Cite this article
[IEEE Style]
J. Lee, C. Lee, W. Choi, "Giga-bps CMOS Clock and Data Recovery Circuit with a novel Adaptive Phase Detector," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 10, pp. 987-992, 2002. DOI: .
[ACM Style]
Jae-Wook Lee, Cheon-O Lee, and Woo-Young Choi. 2002. Giga-bps CMOS Clock and Data Recovery Circuit with a novel Adaptive Phase Detector. The Journal of Korean Institute of Communications and Information Sciences, 27, 10, (2002), 987-992. DOI: .
[KICS Style]
Jae-Wook Lee, Cheon-O Lee, Woo-Young Choi, "Giga-bps CMOS Clock and Data Recovery Circuit with a novel Adaptive Phase Detector," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 10, pp. 987-992, 10. 2002.