High Speed Modular Multiplication Algorithm for RSA Cryptosystem 


Vol. 27,  No. 3, pp. 256-262, Mar.  2002


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  Abstract

This paper presents a novel radix-4 modular multiplication algorithm based on the sign estimation technique [3J. The sign estimation technique detects the sign of a number represented in the form of a carry-sum pair. It can be implemented with 5-bit carry look-ahead adder. The hardware speed of the cryptosystem is dependent on the performance modular multiplication of large numbers. Our algorithm requires only (n/2+3) clock cycle for n bit modulus in performing modular multiplication. Our algorithm out-performs existing algorithm in terms of required clock cycles by a half. It is efficient for modular exponentiation with large modulus used in RSA cryptosystem. Also, we use high-speed adder [7] instead of CPA (Carry Propagation Adder) for modular multiplication hardware performance in final stage of CSA (Carry Save Adder) output. We apply RL (Right-and-Left) binary method for modular exponentiation because the number of clock cycles required to complete the modular exponentiation takes n cycles. Thus, One 1024-bit RSA operation can be done after n(n/2+3) clock cycles.

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  Cite this article

[IEEE Style]

K. Cho and J. Cho, "High Speed Modular Multiplication Algorithm for RSA Cryptosystem," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 3, pp. 256-262, 2002. DOI: .

[ACM Style]

Koon-Shik Cho and Jun-Dong Cho. 2002. High Speed Modular Multiplication Algorithm for RSA Cryptosystem. The Journal of Korean Institute of Communications and Information Sciences, 27, 3, (2002), 256-262. DOI: .

[KICS Style]

Koon-Shik Cho and Jun-Dong Cho, "High Speed Modular Multiplication Algorithm for RSA Cryptosystem," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 3, pp. 256-262, 3. 2002.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880