A study on the Circuit Designed for Bottle-neck Rejection and Effective PCI 


Vol. 27,  No. 4, pp. 365-370, Apr.  2002


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  Abstract

In this paper external image multi-processing digital signal the transmit is the possibility of doing system with the PCI the design. The bottle-neck which it follows in transmission ratio limit of the CPU and the circumference machineries and tools against the image data which with the improve one thing becomes the processing with the real-time efficiently the transmit and the control is the possibility of doing structure the proposed. The also with the resource amount used 13% reduced which PCI fast data transfer and DMA function. The designed is operation verification against the function and the timing which use Max+plus II.

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  Cite this article

[IEEE Style]

I. Lee, J. Kang, H. Kim, "A study on the Circuit Designed for Bottle-neck Rejection and Effective PCI," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 4, pp. 365-370, 2002. DOI: .

[ACM Style]

In-sup Lee, Jeong-Yong Kang, and Hwan-yong Kim. 2002. A study on the Circuit Designed for Bottle-neck Rejection and Effective PCI. The Journal of Korean Institute of Communications and Information Sciences, 27, 4, (2002), 365-370. DOI: .

[KICS Style]

In-sup Lee, Jeong-Yong Kang, Hwan-yong Kim, "A study on the Circuit Designed for Bottle-neck Rejection and Effective PCI," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 4, pp. 365-370, 4. 2002.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880