Modulation Code for Removing Error Patterns on 4-Level NAND Flash Memory 


Vol. 35,  No. 12, pp. 965-970, Dec.  2010


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  Abstract

In the NAND flash memory storing two bits per cell, data is discriminated among four levels of electrical charges. We refer to these four levels as E, P1, P2, and P3 from the low voltage. In the statistics, many errors occur when E and P3 are stored at the next cells. Therefore, we propose a coding scheme for avoiding E-P3 or P3-E data patterns. We investigate two modulation codes for 9/10 code (9 bit input and 5 symbol codeword) and 11/12 code (11 bit input and 6 symbol codeword).

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  Cite this article

[IEEE Style]

D. Park, J. Lee, G. Yang, "Modulation Code for Removing Error Patterns on 4-Level NAND Flash Memory," The Journal of Korean Institute of Communications and Information Sciences, vol. 35, no. 12, pp. 965-970, 2010. DOI: .

[ACM Style]

Donghyuk Park, Jaejin Lee, and Giju Yang. 2010. Modulation Code for Removing Error Patterns on 4-Level NAND Flash Memory. The Journal of Korean Institute of Communications and Information Sciences, 35, 12, (2010), 965-970. DOI: .

[KICS Style]

Donghyuk Park, Jaejin Lee, Giju Yang, "Modulation Code for Removing Error Patterns on 4-Level NAND Flash Memory," The Journal of Korean Institute of Communications and Information Sciences, vol. 35, no. 12, pp. 965-970, 12. 2010.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880