Design of a CMOS Single Bit 3rd Order Delta-Sigma Modulator with Switched Operational Amplifier 


Vol. 37,  No. 8, pp. 712-719, Aug.  2012


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  Abstract

This paper presents Single-bit Third order Delta-Sigma Modulator, which can be applied to the Low speed High resolution ADC in Audio signal Process System. Whereas the Operational Amplifier in modulator consumed static power dissipation in operating, this modulator used Switching on/off techniques, which makes the Power dissipation of the modulator reduced. Also proposed modulator minimizes frequency characteristic variation by optimizing switch position. And this modulator chooses Single-bit type to guarantee stability. The designed ADC went through 0.35um CMOS n-well 1-poly 4-metal process to be a final product, and the final product has shown 17.1mW of power dissipation with 3.3V of Supply Voltage, 6.4MHz of conversion rate. And 84.3dB SNDR and 13.5bit ENOB with 20KHz of input frequency.

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  Cite this article

[IEEE Style]

H. Lee, S. Dai, T. Yoo, K. Lee, K. Yoon, S. Lee, "Design of a CMOS Single Bit 3rd Order Delta-Sigma Modulator with Switched Operational Amplifier," The Journal of Korean Institute of Communications and Information Sciences, vol. 37, no. 8, pp. 712-719, 2012. DOI: .

[ACM Style]

Han-Ul Lee, Shi Dai, Tai-kyung Yoo, Keon Lee, Kwang-Sub Yoon, and Sang-Min Lee. 2012. Design of a CMOS Single Bit 3rd Order Delta-Sigma Modulator with Switched Operational Amplifier. The Journal of Korean Institute of Communications and Information Sciences, 37, 8, (2012), 712-719. DOI: .

[KICS Style]

Han-Ul Lee, Shi Dai, Tai-kyung Yoo, Keon Lee, Kwang-Sub Yoon, Sang-Min Lee, "Design of a CMOS Single Bit 3rd Order Delta-Sigma Modulator with Switched Operational Amplifier," The Journal of Korean Institute of Communications and Information Sciences, vol. 37, no. 8, pp. 712-719, 8. 2012.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880