Power-Minimizing DVFS Algorithm Using Estimation of Video Frame Decoding Complexity 


Vol. 38,  No. 1, pp. 46-53, Jan.  2013


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  Abstract

Recently, intensive research has been performed for reducing video decoder energy consumption, especially based on DVFS (Dynamic Voltage and Frequency Scaling) technique. Our previous work [1] has proposed the optimal DVFS algorithm for energy reduction in video decoders. In spite of the mathematical optimality of the algorithm, the precondition of known frame decoding cycle/complexity limits its application to some realistic scenarios. This paper overcomes this limitation by frame data size-based estimation of frame decoding complexity. The proposed decoding complexity estimation method shows over 90% accuracy. And with this estimation method and buffer underflow margin of around 20% of frame size, almost same power consumption reduction performance as the optimal algorithm can be achieved.

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  Cite this article

[IEEE Style]

H. Ahn and S. Jeong, "Power-Minimizing DVFS Algorithm Using Estimation of Video Frame Decoding Complexity," The Journal of Korean Institute of Communications and Information Sciences, vol. 38, no. 1, pp. 46-53, 2013. DOI: .

[ACM Style]

Heejune Ahn and Seungho Jeong. 2013. Power-Minimizing DVFS Algorithm Using Estimation of Video Frame Decoding Complexity. The Journal of Korean Institute of Communications and Information Sciences, 38, 1, (2013), 46-53. DOI: .

[KICS Style]

Heejune Ahn and Seungho Jeong, "Power-Minimizing DVFS Algorithm Using Estimation of Video Frame Decoding Complexity," The Journal of Korean Institute of Communications and Information Sciences, vol. 38, no. 1, pp. 46-53, 1. 2013.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880