A Novel Architecture of Frequency Compensation Module without Round-Over Errors for Precision Timing Protocol Systems 


Vol. 44,  No. 10, pp. 1812-1823, Oct.  2019
10.7840/kics.2019.44.10.1812


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  Abstract

Industries requiring automation of measurement, such as automobiles, aerospace, and military industries, need a deterministic time reference provided by Ethernet-based IEEE 1588 time synchronization protocol. In a time synchronization system, all slaves receive a PTP message periodically every 1 second (or 1/8 second, or 2 seconds) from the master and synchronize with the master time. To this end, a correction system is built in the PTP module. In the existing correction system, an error occurs that the addition value for the clock frequency correction is changed. To solve this problem, the correction system was modified so that when the trigger signal is output to the Second register by outputting the Addend and Increment register values as integers instead of decimals, the remainder of the accumulator is not present. This scheme doesn’t cause a time offset between the master and the slave in the time synchronization system by eliminating the constantly changing error of the value of the Subsecond register. It is evaluated by using MATLAB.

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  Cite this article

[IEEE Style]

J. Lee, P. Park, M. Son, C. Yoon, "A Novel Architecture of Frequency Compensation Module without Round-Over Errors for Precision Timing Protocol Systems," The Journal of Korean Institute of Communications and Information Sciences, vol. 44, no. 10, pp. 1812-1823, 2019. DOI: 10.7840/kics.2019.44.10.1812.

[ACM Style]

Jeong-do Lee, Pu-sik Park, Myeong-hwan Son, and Chong-ho Yoon. 2019. A Novel Architecture of Frequency Compensation Module without Round-Over Errors for Precision Timing Protocol Systems. The Journal of Korean Institute of Communications and Information Sciences, 44, 10, (2019), 1812-1823. DOI: 10.7840/kics.2019.44.10.1812.

[KICS Style]

Jeong-do Lee, Pu-sik Park, Myeong-hwan Son, Chong-ho Yoon, "A Novel Architecture of Frequency Compensation Module without Round-Over Errors for Precision Timing Protocol Systems," The Journal of Korean Institute of Communications and Information Sciences, vol. 44, no. 10, pp. 1812-1823, 10. 2019. (https://doi.org/10.7840/kics.2019.44.10.1812)

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pISSN : 1226 - 4717
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