Task-Level Memory Fault-Tolerance Technique Using an RM Scheduler on Real-Time Embedded Systems 


Vol. 46,  No. 4, pp. 757-766, Apr.  2021
10.7840/kics.2021.46.4.757


PDF
  Abstract

In this paper, we implement and report a software-based technique that tolerates memory faults at task level in the RTEMS/SPARC environment used in satellites. Since it is not trivial for software to handle the uncorrectable faults by hardware, it is common to handle them by means of rebooting using a watchdog timer. Such a rebooting approach causes suspensions of mission or functionality for a substantial amount of time, jeopardizing the real-time operation of the safety-critical system. In this work, we propose to tolerate memory faults in SRAM at task level by modifying the Rate-Monotonic (RM) scheduler of the RTEMS (Real-Time Executive for Multiprocessor Systems) operating system, ported to a SPARC(Scalable Processor ARChitecture)-based processor. We implemented fault injection, fault detection, and fault correction techniques in the RTEMS/SPARC environment. In addition, in order to show the cost effectiveness of the proposed implementation, the WCET (worst-case execution time) of the tasks and the CPU utilization have been measured and analyzed.

  Statistics
Cumulative Counts from November, 2022
Multiple requests among the same browser session are counted as one view. If you mouse over a chart, the values of data points will be shown.


  Cite this article

[IEEE Style]

B. Kim and H. Yang, "Task-Level Memory Fault-Tolerance Technique Using an RM Scheduler on Real-Time Embedded Systems," The Journal of Korean Institute of Communications and Information Sciences, vol. 46, no. 4, pp. 757-766, 2021. DOI: 10.7840/kics.2021.46.4.757.

[ACM Style]

Beomsik Kim and Hoeseok Yang. 2021. Task-Level Memory Fault-Tolerance Technique Using an RM Scheduler on Real-Time Embedded Systems. The Journal of Korean Institute of Communications and Information Sciences, 46, 4, (2021), 757-766. DOI: 10.7840/kics.2021.46.4.757.

[KICS Style]

Beomsik Kim and Hoeseok Yang, "Task-Level Memory Fault-Tolerance Technique Using an RM Scheduler on Real-Time Embedded Systems," The Journal of Korean Institute of Communications and Information Sciences, vol. 46, no. 4, pp. 757-766, 4. 2021. (https://doi.org/10.7840/kics.2021.46.4.757)

Search
(IN TITLE, AUTHOR, ABSTRACT,KEYWORDS)

Advanced Search ▼

POPULAR KEYWORDS
(TOP 10 KEYWORDS)

Recent Publications
(LAST 3 YEARS)






pISSN : 1226 - 4717
eISSN : 2287 - 3880