Code Rate 1/2, 2304-b LDPC Decoder for IEEE 802.16e WiMAX 


Vol. 36,  No. 4, pp. 414-422, Apr.  2011


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  Abstract

This paper describes a design of low-density parity-check(LDPC) decoder supporting block length 2,304-bit and code rate 1/2 of IEEE 802.16e mobile WiMAX standard. The designed LDPC decoder employs the min-sum algorithm and partially parallel layered-decoding architecture which processes a sub-matrix of 96×96 in parallel. By exploiting the properties of the min-sum algorithm, a new memory reduction technique is proposed, which reduces check node memory by 46% compared to conventional method. Functional verification results show that it has average bit-error-rate(BER) of 4.34×10?? for AWGN channel with Eb/No=2.1㏈. Our LDPC decoder synthesized with a 0.18-㎛ CMOS cell library has 174,181 gates and 52,992 bits memory, and the estimated throughput is about 417 Mbps at 100-㎒@1.8-V.

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  Cite this article

[IEEE Style]

H. Kim and K. Shin, "Code Rate 1/2, 2304-b LDPC Decoder for IEEE 802.16e WiMAX," The Journal of Korean Institute of Communications and Information Sciences, vol. 36, no. 4, pp. 414-422, 2011. DOI: .

[ACM Style]

Hae-ju Kim and Kyung-wook Shin. 2011. Code Rate 1/2, 2304-b LDPC Decoder for IEEE 802.16e WiMAX. The Journal of Korean Institute of Communications and Information Sciences, 36, 4, (2011), 414-422. DOI: .

[KICS Style]

Hae-ju Kim and Kyung-wook Shin, "Code Rate 1/2, 2304-b LDPC Decoder for IEEE 802.16e WiMAX," The Journal of Korean Institute of Communications and Information Sciences, vol. 36, no. 4, pp. 414-422, 4. 2011.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880