Circuit Implementation of Quantum Comparator Using a Quantum Adder 


Vol. 46,  No. 9, pp. 1373-1377, Sep.  2021
10.7840/kics.2021.46.9.1373


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  Abstract

This research suggest the quantum comparator using the quantum adder which returns a carry bit and circuit implementation. Furthermore, we design a circuit of 3-qubit data space and present the simulation result.

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  Cite this article

[IEEE Style]

Y. Kang and J. Heo, "Circuit Implementation of Quantum Comparator Using a Quantum Adder," The Journal of Korean Institute of Communications and Information Sciences, vol. 46, no. 9, pp. 1373-1377, 2021. DOI: 10.7840/kics.2021.46.9.1373.

[ACM Style]

Yu-jin Kang and Jun Heo. 2021. Circuit Implementation of Quantum Comparator Using a Quantum Adder. The Journal of Korean Institute of Communications and Information Sciences, 46, 9, (2021), 1373-1377. DOI: 10.7840/kics.2021.46.9.1373.

[KICS Style]

Yu-jin Kang and Jun Heo, "Circuit Implementation of Quantum Comparator Using a Quantum Adder," The Journal of Korean Institute of Communications and Information Sciences, vol. 46, no. 9, pp. 1373-1377, 9. 2021. (https://doi.org/10.7840/kics.2021.46.9.1373)

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pISSN : 1226 - 4717
eISSN : 2287 - 3880