A 8192-point pipelined FFT/IFFT processor using two-step convergent block floating-point scaling technique
Vol. 27, No. 10, pp. 963-972, Oct. 2002
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Cite this article
[IEEE Style]
S. Lee, D. Yang, K. Shin, "A 8192-point pipelined FFT/IFFT processor using two-step convergent block floating-point scaling technique," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 10, pp. 963-972, 2002. DOI: .
[ACM Style]
Seung-Ky Lee, Dae-Sung Yang, and Kyung-Wook Shin. 2002. A 8192-point pipelined FFT/IFFT processor using two-step convergent block floating-point scaling technique. The Journal of Korean Institute of Communications and Information Sciences, 27, 10, (2002), 963-972. DOI: .
[KICS Style]
Seung-Ky Lee, Dae-Sung Yang, Kyung-Wook Shin, "A 8192-point pipelined FFT/IFFT processor using two-step convergent block floating-point scaling technique," The Journal of Korean Institute of Communications and Information Sciences, vol. 27, no. 10, pp. 963-972, 10. 2002.