An Efficient Architecture Exploration Method for Optimal ASIP Design 


Vol. 32,  No. 9, pp. 913-921, Sep.  2007


PDF Full-Text
  Abstract

Retargetable compiler which generates executable code for a target processor and performance profiler are required to design a processor optimized for a specific application. This paper presents an architecture exploration methodology based on ADL (Architecture Description Language). We synthesized instruction set and optimized processor structure using information extracted from application program. The information of operation sequences executed frequently and register usage are used for processor optimization. Architecture exploration has been performed for JPEG encoder to show the effectiveness of the system. The ASIP designed using the proposed method shows 1.97 times better performance.

  Statistics
Cumulative Counts from November, 2022
Multiple requests among the same browser session are counted as one view. If you mouse over a chart, the values of data points will be shown.


  Cite this article

[IEEE Style]

S. Lee and S. Hwang, "An Efficient Architecture Exploration Method for Optimal ASIP Design," The Journal of Korean Institute of Communications and Information Sciences, vol. 32, no. 9, pp. 913-921, 2007. DOI: .

[ACM Style]

Sung-Rae Lee and Sun-Young Hwang. 2007. An Efficient Architecture Exploration Method for Optimal ASIP Design. The Journal of Korean Institute of Communications and Information Sciences, 32, 9, (2007), 913-921. DOI: .

[KICS Style]

Sung-Rae Lee and Sun-Young Hwang, "An Efficient Architecture Exploration Method for Optimal ASIP Design," The Journal of Korean Institute of Communications and Information Sciences, vol. 32, no. 9, pp. 913-921, 9. 2007.

Search
(IN TITLE, AUTHOR, ABSTRACT,KEYWORDS)

Advanced Search ▼

POPULAR KEYWORDS
(TOP 10 KEYWORDS)

Recent Publications
(LAST 3 YEARS)






pISSN : 1226 - 4717
eISSN : 2287 - 3880