Design of Low-Power and Low-Complexity MIMO-OFDM Baseband Processor for High Speed WLAN Systems 


Vol. 33,  No. 11, pp. 940-948, Nov.  2008


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  Abstract

This paper presents a low-power, low-complexity design and implementation results of a high speed multiple-input multiple-output orthogonal frequency division multiplexing (MIMO-OFDM) wireless LAN (WLAN) baseband processor. The proposed processor is composed of the physical layer convergence procedure (PLCP) processor and physical medium dependent (PMD) processor, which have been optimized to have low-power and reduced-complexity architecture. It was designed in a hardware description language (HDL) and synthesized to gate-level circuits using 0.18um CMOS standard cell library. As a result, the proposed TX-PLCP processor reduced the power consumption by as much as 81% over the bit-level operation architecture. Also, the proposed MIMO symbol detector reduced the hardware complexity by 18% over the conventional SQRD-based architecture with division circuits and square root operations.

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  Cite this article

[IEEE Style]

J. Im, M. Cho, Y. Jung, J. Kim, "Design of Low-Power and Low-Complexity MIMO-OFDM Baseband Processor for High Speed WLAN Systems," The Journal of Korean Institute of Communications and Information Sciences, vol. 33, no. 11, pp. 940-948, 2008. DOI: .

[ACM Style]

Junha Im, Misuk Cho, Yunho Jung, and Jaeseok Kim. 2008. Design of Low-Power and Low-Complexity MIMO-OFDM Baseband Processor for High Speed WLAN Systems. The Journal of Korean Institute of Communications and Information Sciences, 33, 11, (2008), 940-948. DOI: .

[KICS Style]

Junha Im, Misuk Cho, Yunho Jung, Jaeseok Kim, "Design of Low-Power and Low-Complexity MIMO-OFDM Baseband Processor for High Speed WLAN Systems," The Journal of Korean Institute of Communications and Information Sciences, vol. 33, no. 11, pp. 940-948, 11. 2008.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880