Digital Library

Vol. 15, No. 6, Jun. 1990



The Implementation of the Hardware Disign Language

 
Vol. 15, No. 6, pp. 447-454, Jun. 1990

English Character Recognition and Design of Preprocessing Neural Chip

 
Vol. 15, No. 6, pp. 455-466, Jun. 1990

A Circuit Design of 4 : 1 Parallel ADC Using Source Coupled FET Logic

     
Vol. 15, No. 6, pp. 467-474, Jun. 1990

Construction of Spread Spectrum Power Line Communication Equipment Using Power Line Synchronization

   
Vol. 15, No. 6, pp. 475-484, Jun. 1990

Fourth-power-Law Timing Recovery for Minimum-Bandwidth Systems

   
Vol. 15, No. 6, pp. 485-493, Jun. 1990

A DPSK Demodulator of Direct Sequence Spread Spectrum using SAW Convolver

   
Vol. 15, No. 6, pp. 494-505, Jun. 1990

The Simulation Algorithm for Performance Analysis of Slotted 1-Persistent CSMA / CD Bus Protocol

   
Vol. 15, No. 6, pp. 506-515, Jun. 1990

Hierarchical Network Management Algorithm for Highly Available System with a LAN

   
Vol. 15, No. 6, pp. 516-525, Jun. 1990

A Study on the Performance of the Wave Digital Filters

   
Vol. 15, No. 6, pp. 526-534, Jun. 1990



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pISSN : 1226 - 4717
eISSN : 2287 - 3880