An Efficient Collapsing Algorithm for Current-based Testing Models in CMOS VLSI 


Vol. 29,  No. 10, pp. 1205-1214, Oct.  2004


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  Abstract

For the physical defects occurring in CMOS circuits which are not handled well by voltage-based testing, current testing 15 remarkable testing technique. Fault models based on defects must accurately describe the behaviour of the circuit containing the defect In this paper, An efficient collapsing algorithm for fault models often used in current testing IS proposed Experimental results for is CAS benchmark circuits show the effectiveness of the proposed method m reducing the number of faults that have to be considered by fault collapsing and Its usefulness m various current based testing models.

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  Cite this article

[IEEE Style]

D. Kim and S. Bae, "An Efficient Collapsing Algorithm for Current-based Testing Models in CMOS VLSI," The Journal of Korean Institute of Communications and Information Sciences, vol. 29, no. 10, pp. 1205-1214, 2004. DOI: .

[ACM Style]

Dae-Ik Kim and Sung-Hwan Bae. 2004. An Efficient Collapsing Algorithm for Current-based Testing Models in CMOS VLSI. The Journal of Korean Institute of Communications and Information Sciences, 29, 10, (2004), 1205-1214. DOI: .

[KICS Style]

Dae-Ik Kim and Sung-Hwan Bae, "An Efficient Collapsing Algorithm for Current-based Testing Models in CMOS VLSI," The Journal of Korean Institute of Communications and Information Sciences, vol. 29, no. 10, pp. 1205-1214, 10. 2004.

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pISSN : 1226 - 4717
eISSN : 2287 - 3880